KEYNOTE: Cryogenic CMOS and Silicon Spin Qubits for Fault-Tolerant Quantum Computing

Building a fault-tolerant quantum computer with sufficient logical qubits to solve useful problems is a daunting challenge. Three main ingredients are required: (1) good physical qubits that can be entangled, properly interconnected to control electronics and fabricated reliably at scale; (2) qubit control electronics that can scale in area, form factor and cost to enable millions of physical qubits; and (3) a tightly optimized software stack with quantum error correction (QEC) that can map onto the physical qubit array and leverage system-level optimizations to improve overall performance. This talk provides an overview of Intel’s approach to fault-tolerant quantum computing, with a focus on cryogenic control electronics and silicon spin qubit technology.