4-Pole 20-nm InGaAs HEMT-on-Silicon Technology for Enhanced Breakdown Voltage Achieving fmax > 650GHz

We present an RF/mixed-signal technology based on 20-nm In0.8Ga0.2As HEMTs featuring backside gate and field plate architectures. It targets digital logic for monolithically integrated front-ends and power amplifier MMICs requiring improved output power and linearity. Enhanced high-voltage HEMTs with improved on-state breakdown voltage through synergistic backside field plate and drain-side gate-recess engineering are demonstrated. The device achieves an ID,max of 700 mA/mm, a peak transconductance of 2250 mS/mm at VDS = 1 V, a gds of 15 mS/mm at VGS(gm,peak), an RON of 0.5 Ω · mm, an fT ~ 300 GHz, and an fmax > 650 GHz. Moreover, inverters and NAND gates are demonstrated using Enhancement/Depletion-mode HEMTs. This technology leverages both digital and analog capabilities on a single chip to increase power amplifier output power at 300 GHz and beyond.