A 4.7mW, 57–64GHz Mixer-First Receiver in 22nm FDSOI for Green Cognitive Radios

This paper presents a spectrum-agile 60 GHz cognitive radio architecture that achieves a 94% reduction in idle power consumption via a hierarchical wake-up strategy. The system dynamically scales from a 4-element sparse sensing subarray (18.8 mW) to a 16-element verification mode, activating the full 64-element array only for confirmed communication. Key to this architecture is a mixer-first receiver fabricated in 22 nm Fully Depleted Silicon-On-Insulator (FDSOI) Complementary Metal-Oxide-Semiconductor (CMOS) that eliminates the Low Noise Amplifier (LNA) to prioritize frequency agility and power efficiency. The receiver achieves a measured conversion gain of >16 dB and an input return loss < -10 dB across the 57–64 GHz band, while consuming only 4.7 mW per element. System-level analysis using receiver performance metrics demonstrates that this topology meets regulatory detection thresholds, enabling practical, battery-constrained millimeter-wave (mmWave) Massive Multiple-Input Multiple-Output (mMIMO) deployments.