Design methodology for Sub-THz Power Amplifier and its application to 6G D-band in advanced CMOS and BiCMOS technologies

To enable ultra-high-speed wireless communication, Sub-THz frequency bands have become a key point for emerging applications. However, a significant technological challenge arises with power amplifiers. Operating near the maximum oscillation frequency (fmax) of transistors results in low intrinsic gain and poor efficiency. Advanced integrated technologies with higher fT/ fmax are crucial to address this limitation. Additionally, circuit designers can contribute by employing gain enhancement techniques. Hence, techniques such as gain boosting and neutralization have become essential in power amplifier architectures. This work aims to present the design methodology for these gain enhancement techniques and their application to the development of D-band power amplifiers using CMOS 28nm FDSOI and B55X technologies.