A Sub mW Low Flick Noise Cryo-CMOS QVCO for Quantum Computing Application

This paper reports a quadrature voltage-controlled oscillator (QVCO) with a centre frequency of 5.7 GHz for quantum computing applications. A four-winding transformer-based topology with a sizable coupling capacitor is proposed, which addresses the issue of QVCO flick noise deterioration at higher frequencies and achieves low phase noise while consuming minimal power at temperature of 6 K. The proposed QVCO is fabricated with a standard 55-nm CMOS process. Measurement results show that the FoM improves 7~10dB from 300 K to 6 K, while the phase error is 1.3° at centre frequency under 6 K. Benefiting from the proposed structure, the power consumption of the QVCO is only 0.98 mW and the flick noise corner is 160-230 kHz across the frequency tuning range at 6 K.