A 115.7–139.7 GHz Amplifier with 19.7 dB Peak Gain and 7.9 dB NF in 40-nm CMOS
A 115.7–139.7 GHz low noise amplifier (LNA) is presented. The neutralization capacitance is chosen to minimize the tradeoff between the achievable gain and noise figure. Based on the fourth-order matching network, interstage transformers are designed, and an interstage filtering transformer reduces the gain at low frequencies, resulting in a flat bandwidth overall. The five-stage LNA provides the peak gain, bandwidth, and noise figure of 19.7 dB, 24 GHz, and 7.9 dB, respectively. The presented LNA achieves the highest gain-bandwidth product of 231.9 GHz with a small DC power consumption of 17.8 mW compared to state-of-the-art CMOS LNAs in D-band.