A 280 GHz Sub-Harmonic Injection Locked Triple Push Oscillator in 45 nm CMOS PD SOI Technology

A 280 GHz sub harmonic injection locked oscillator implemented in 45 nm RFE technology is presented. It consists in a single to differential buffer, a frequency doubler and a core triple-push oscillator. The output power on 50  load is -1 dBm at 280 GHz and remains constant across the oscillator 4% tuning and locking range. The circuit, implemented in a 45nm partially depleted CMOS process, consumes 75 mW resulting in a record 1% DC-to-RF efficiency for CMOS technologies. The injection locked phase noise is as low as -110 dBc/Hz at 1 MHz offset. This compact oscillator (0.4x0.55mm) is intended to be integrated with on-chip antennas in an arrayed arrangement, resorting in an efficient source for sub-THz imagery and radcom aplications.