Chiplet technology has emerged as the ultimate solution for the slowdown of Moore’s law. For decades, the scaling in the process node meant improvement in performance and reduction in power and cost. As the complexity of the systems has increased and the cost of fabrication in advanced nodes has risen, the optimum solution presents itself as a SiP rather than a SoC. This talk debates the case for chiplet-based architecture and elaborates on how it improves the yield, increases the performance, and reduces the overall cost of complex systems.