A 132GHz SiGe BiCMOS Sampler for Linear Front-Ends

A linear sampler with integrated clock amplifier is demonstrated in a SiGe BiCMOS process with an fT of 400 GHz. The track and hold (T/H) core employs a switched emitter follower (SEF) topology with asymmetrically-sized MOSFET switches and has a track-mode bandwidth of over 110 GHz, including the input and output buffers. The measured hold-mode isolation is over 20 dB up to 67 GHz. An SFDR of 43.54 dB was measured for 11GHz, 0.3Vpp per side sinusoidal inputs sampled with a 132GHz clock signal, the highest reported for a silicon sampler. Equipment-limited operation with 192GBaud NRZ and 128GBaud PAM-4 input signals sampled by 96GHz and 64GHz clock signals, respectively, is also demonstrated, producing NRZ and PAM-4 outputs with expanded eye openings at 96 GBaud and 64 GBaud, respectively, as required for implementation of the 1:2 Analog DeMUX function. The circuit consumes 235 mW from 1.8V, 2.1V and 2.5V supplies.