A 71–86-GHz Receiver with 5-GHz IF Signal Bandwidth for E-Band Broadband Communication in 65-nm CMOS

This paper presents a 71–86-GHz receiver (RX) with 5-GHz IF bandwidth (BW) in 65-nm CMOS, which can be applied to high-speed and large-capacity wireless communications. The proposed receiver integrates a low-noise amplifier (LNA), a down-conversion mixer, and a baseband circuit that utilizes a mutually-coupled inductive load for wideband IF. Measurements show the receiver achieves a maximum conversion gain (CG) of 28 dB and a minimum single-sideband noise figure (NFssb) of 6.5 dB at 77-GHz. The measured error vector magnitude (EVM) is less than −34 dB for 0.6 Gb/s 64-QAM signals. The receiver occupies a chip area of 1.45 × 1.09 mm2 with power consumption of 123.4 mW.