WMP: Challenges and Solutions in Signal and Power Integrity for Next-Generation High-Speed Systems

Presentation Abstract
As data-rates continue to rise and system complexity increases, maintaining robust signal integrity (SI) has become a critical challenge in next-generation high-speed systems. Applications in Artificial Intelligence (AI) and cloud computing are driving the demand for higher data throughput and increasingly complex interconnect designs. To meet this demand while maintaining reasonable power consumption, advanced nodes like 3nm and associated packaging technologies, such as chiplets, are being employed — introducing additional signal integrity (SI) challenges. This workshop will address key broadband SI challenges and offer cutting-edge solutions for mitigating impairments like inter-symbol interference (ISI), crosstalk, and discontinuities across a broad frequency spectrum. Participants will also explore modeling and analyzing interconnects and transitions for broadband applications using integral equation (IE) methods, a crucial tool for accurately modeling signal behavior in advanced packaging and PCB designs. The workshop will cover the fundamentals, state-of-the-art techniques, and ongoing challenges of applying these methods to broadband SI analysis in high-speed systems. In addition to signal integrity, power integrity (PI) is an equally critical factor, particularly as emerging AI and cloud computing systems require thousands of amps to be delivered to high-speed digital designs. A specialized talk will address power integrity challenges in multi-die packages, AI chips, and cloud servers, focusing on digital twin PI simulations to mitigate hardware failures. Participants will gain insight into the complexities of end-to-end power delivery networks, voltage regulators, and power integrity digital twins for next-gen systems. The workshop will also build on modeling broadband interconnects, culminating in comprehensive models for packaging and PCB designs using finite element method (FEM) and IE methods. A case study on Rigid-Flex PCB modeling up to 100GHz will be presented, with an in-depth discussion of the challenges encountered. Once the broadband channel model (comprising the package, PCB, and connectors) is established, the workshop will explore the need for spectrally efficient modulation schemes (eg PAM-4) and digital equalization techniques to overcome channel impairments for data-rates exceeding 200Gb/s. With rising data center cooling costs, energy-efficient digital equalization has become a crucial research area. This talk will provide an overview of the evolution, current landscape, and future trends in digital equalization for high-speed links. As background, our IEEE Ottawa AP-S/MT-S chapter recently launched an MTT-sponsored Signal Integrity course in the Kanata tech area, which has been extremely successful among both students and professionals. The course was fully booked, and demand continues to grow, underscoring the importance of providing high-quality content in the signal integrity field.