TUMA24: JESD204B/C Compliant Clock Distributions in Large Array Cascaded Systems

Presentation Abstract
Large phased array systems include multiple RF sampling data converters, which require high precision synchronization to achieve proper beam steering. Synchronization can be achieved by properly aligning the device clocks and phase adjustability of SYSREFs to the data converters for meeting setup and hold time. SYSREFs in large array system can be generated or distributed on tile level, sub-system level and from the host in continuous, pulsed or burst mode. This presentation proposes the JESD204B/C clock buffer-based solution for precise SYSREFs phase alignment and distribution for synchronization up to X-band sampling clocks.