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Tue 9 Jun | 10:36 - 10:51
Room: MicroApps Theater, IMS Exhibit Hall
Garth Sundberg
Synopys, Inc.
The evolution of new technologies and applications are driving increasing chip complexity with reduced design cycles. The layout of dense circuitry central and graphically processing units requires careful attention to ensure proper performance. We demonstrate a methodology which couples electromagnetic extraction, a SPICE solver, and machine learning to automatically co-optimize the physical layout with the circuit netlist to achieve the desired performance. This workflow is demonstrated on a 2.5GHz low noise amplifier (LNA).