WEMA1: Software Defined Radio (SDR) on a chip - from Ethernet to RF with an integrated processor sub-system

Abstract
The latest generation of ADI monolithically integrated software defined radio chip is introduced in this MicroApp. This 6th generation device builds on 15 years, and 5 generations of ADI integrated transceiver SoCs. It contains 4 transmitters, and 4 receiver chains along with a rich set of radio signal processing features. The latest addition to this generation is the low-PHY functionality supporting 4G and 5G wireless standards, 2x25Gbps Ethernet based fronthaul interface in accordance with ORAN standard, and a processor sub-system eliminating the need for an external FPGA.