WSL: Sub-THz Power Amplifiers in CMOS, SiGe, and III-V

Presentation Abstract
The power amplifier is one of the most critical blocks in the transceiver and obtaining the desired performance from the PA at sub-THz frequencies remains a challenge. At sub-THz frequencies, transistors suffer from reduced gain impacting the performance of the PA. Designing sub-THz PAs with improved power added efficiency (PAE), output power, and linearity is an active area of research. SiGe and III-V technologies such as InP and GaN demonstrate higher fT and fmax than CMOS and as a result, sub-THz PAs designed in these technologies outperform their CMOS-based counterparts. On the other hand, CMOS can achieve better yield and higher level of integration compared to III-V technologies. In this workshop, the speakers will present recent developments in sub-THz PA design in CMOS, SiGe, and III-V technologies demonstrating their comparisons and trade-offs.