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Tue 17 Jun | 13:30 - 15:10
205
D-Band Circuits and Systems for Sensing and Communications
The focus of this session is to introduce innovative D-band circuits and systems in the sensing and communication domains. We start with a 129–148GHz radar transceiver achieving broadband performance through the TL-MCR concept followed by a 169GHz sparse chirp-stitched radar system in 40nm CMOS with an impressive range resolution of 1mm. The third paper is a >27% tuning range sub-sampling PLL in 28nm CMOS. A novel switching mechanism for BPSK modulation for backscattering application is reported in the fourth paper. We close the session with a D-band TRX chipset with >40dB IRR and very low-loss 4-way power combiner built using a novel enhanced magnetic coupling cavity with transmission line (EMCC-TL).
13:30 - 13:50
RTu3B-1 A Low-Power D-Band Radar Transceiver with TL-MCR Matching Technique and Output Phase Shifting
13:50 - 14:10
RTu3B-2 A Terahertz FMCW Radar with 169-GHz Synthetic Bandwidth and Reconfigurable Polarization in 40-nm CMOS
14:10 - 14:30
RTu3B-3 A 108-to-141.8GHz 27.1%-Tuning-Range Synthesizer Employing a Dual-Reference-FTL Sub-Sampling PLL and 3rd-Harmonic-Enhancement Class-F VCO and Injection-Locked Frequency Tripler
14:30 - 14:50
RTu3B-4 A Fully Integrated 263-GHz Retro-Backscatter Circuit with 105°/82° Reading Angle and 12-dB Conversion Loss
14:50 - 15:10
RTu3B-5 A 127-to-156GHz 64QAM/256QAM Zero-IF CMOS Transceiver Chipset Achieving 42dB IRR and 17.8dBm Output Power