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Tue 9 Jun | 10:10 - 11:50
255
Emerging AI workloads demand an exponential increase in XPU and switch scale-up interconnect bandwidth, alongside high-density die-to-die interfaces. This session explores novel Co-Packaged Optics (CPO) link architectures designed to meet these challenges. Presentations will highlight the use of Micro-Ring Modulators (MRM) and the enhancement of bandwidth through ultra-low-power coherent optics. Key technical deep-dives include UCIe-inspired clock-forwarding and the development of compact, power-efficient building blocks, featuring innovative Phase Interpolator (PI) designs.
10:10 - 10:30
Tu2J-1 A 1.49 pJ/b 4-Channel 256-Gb/s MRM-Based Coherent Co-Packaged Optics with Linear Carrier Phase Recovery
10:30 - 10:50
Tu2J-2 A 200Gbps 0.67pJ/bit Transceiver Front-end for silicon-photonic with group delay and nonlinear adjustment in 28nm CMOS
10:50 - 11:10
Tu2J-3 An 8×64 Gb/s PAM-4 Retimed Optical Receiver with Forwarded Clock for UCIe Compliant Optical I/O in 28-nm CMOS
11:10 - 11:30
Tu2J-4 A 3.5-to-14GHz, Less-Than-0.81LSB-INLpp, 7b Adaptive Phase Interpolator with Segment-Squeeze INL Calibration Algorithm for Die-to-Die Interfaces