IMS2026 Schedule

This technical session explores the evolving demands of next-generation communication, radar, imaging, and SATCOM applications. The session will address the challenges for achieving high output power, efficiency, linearity, bandwidth, and robust performance. The first paper presents a 10–40GHz stacked push-pull PA that enhances both bandwidth and linearity through the harmonic superposition of drain-source waveforms. The second paper focuses on a V-band PA featuring a dual-mode slotline-based series-parallel combiner. The third paper introduces a D-band Doherty PA incorporating a Guanella transformer and adaptive bias. The fourth paper presents a process robust K-band balanced PA with a current-mode adaptive bias circuit. The final paper demonstrates a 5G phased-array TX with load compensating Doherty PA.

This session consists of five papers on advanced techniques for high-performance oscillators operating at RF frequencies. The first paper introduces an inverse-class-F VCO utilizing a distributed dual-mode resonator (DMR) instead of a transformer-based tank, enhancing high-Q performance at both fundamental and second harmonic frequencies while suppressing noise conversion and minimizing detrimental third harmonic components. The second paper introduces a quad-core quad-mode VCO utilizing a pure magnetic-coupling technique and a fully symmetrical topology, featuring a centrosymmetric transformer with four coupled inductors and an embedded switched inductor to enable quad-mode operation without frequency tuning range degradation. The third paper presents a series resonance oscillator with bidirectional inductive-mode pulling, enabling ultra-low phase noise and wide tuning range by optimizing mode-switching connections, introducing a balanced-slope NMOS inverter for ripple minimization, and ensuring reliable frequency expansion without added parasitic effects. The fourth paper introduces a coupling-canceling common-mode resonance expansion technique using a tail 8-shaped inductor and staggered tap inductors to enhance wideband common-mode impedance, effectively reducing flicker phase noise without requiring manual tuning. The last paper introduces a multi-tap transformer-based quad-core dual-mode VCO that leverages enhanced electromagnetic mixed-coupling and harmonic-free-like techniques to achieve wideband flicker noise suppression while employing orthogonally stacked dual-core transformers and mode switches to enable a wide frequency tuning range.

This session starts with a low-power analog-mixed-signal machine-learning classifier for wireless signals. This is followed by a fast beam-forming system and a silicon-photonic driver. Finally, a UWB SoC for next-generation ranging and a biomedical sensor are presented.

This session covers recent developments, advanced design techniques, and methodologies in high performance RF and mm-wave SiGe PAs. The first paper introduces a new design methodology for algorithmic inverse design and optimization of multi-stage power-combined mm-wave PAs. The second paper demonstrates the first silicon-based PA providing multiple watts of power at Ka-band. The next paper is a 17–30GHz SiGe common-collector common-base PA with enhanced large-signal stability for SATCOM application. The fourth paper presents an efficient Q-band balanced PA designed using a two-tone load-pull optimization technique. The last paper demonstrates a compact, reconfigurable dual-band 5/6GHz SiGe PA for Wi-Fi 6E application.

This session presents integrated systems and techniques introducing breakthroughs in energy efficiency, accuracy and sensitivity of mm-wave radars and sensors. This includes precision sub-THz near field sensors, an interference cancellation technique for FMCW radars, and an energy-efficient phase-modulated radar SoC for joint radar and communication applications.

Heterogeneous integration is one of the most interesting technology areas that is quickly finding its place in RF and mm-wave applications. This session consists of four papers describing circuits and systems implemented by integrating chips fabricated in different semiconductor technologies into one solution platform. The fifth paper describes a single source impedance thermal noise measurement technique. The session starts with the presentation of a heterogeneously integrated power amplifier module using BiCMOS and RF SOI CMOS chips. The second paper presents integration of GaN circulator with RF SOI voltage boosted clock generation IC. The next paper describes a GaN amplifier embedded in a glass substrate. The fourth paper presents the 3D-integration platform for scaled GaN-on-Si dielets with Intel 16 Si CMOS. The final paper described a formalism for determining thermal noise parameters for MOSFET transistors that requires only single source impedance measurements.

The past few years have arguably seen a decrease in transformational or disruptive discoveries reported in radio-frequency integrated circuits (RFIC) papers and publications. Does this indicate that RFIC design has reached its maturity, or does it instead suggest a shift of innovations in emerging areas across the boundary of RFIC design, such as the heterogeneous integration of silicon, antennas, and processors using advanced packaging? If so, what should our community look for in publications and what would be considered “publishable work”? Are universities and research institutions addressing the most compelling challenges? And what has been the role of the funding agencies in promoting fundamental research? Our panel of experts, with the audience’s participation, will attempt to answer these questions and diagnose the trends seen in RFIC publications and in the field in general.

This session covers high performance PLL and frequency multiplier techniques. The first paper presents a high performance D-band double-sampling PLL with 35.1fs jitter. The second paper demonstrates a THz synthesizer using 85GHz CP-PLL and frequency quadrupler with optimal impedance matching technique. The session also includes a digital background calibration LMS technique for a robust wide-band frequency tripler. The fourth paper presents an injection locked frequency tripler with an amplitude detection method to enhance frequency tracking. Lastly, a compact W-band differential doubler is presented with high conversion gain and >36dBc fundamental rejection ratio.

The focus of this session is to introduce innovative D-band circuits and systems in the sensing and communication domains. We start with a 129–148GHz radar transceiver achieving broadband performance through the TL-MCR concept followed by a 169GHz sparse chirp-stitched radar system in 40nm CMOS with an impressive range resolution of 1mm. The third paper is a >27% tuning range sub-sampling PLL in 28nm CMOS. A novel switching mechanism for BPSK modulation for backscattering application is reported in the fourth paper. We close the session with a D-band TRX chipset with >40dB IRR and very low-loss 4-way power combiner built using a novel enhanced magnetic coupling cavity with transmission line (EMCC-TL).

High-speed circuits are essential to the efficient control and driving of upcoming photonic and quantum systems. This session features a diverse set of papers for such applications. The first paper covers a widely reconfigurable temperature-scalable cryogenic PLL. The second paper covers a low-power correlator targeting communications and compute-in-memory applications. Papers 3 and 4 cover ultra-high-speed drivers for photonic transceivers, designed in FD-SOI CMOS and SiGe BiCMOS respectively. The final paper covers a set of integrated circuits designed in GaAs as an oscilloscope front-end system.

This session presents circuit techniques for radars and phased arrays, achieving good energy and area efficiency, wider bandwidth with improved detection range and resolution. A 1TX/4RX FMCW radar chipset exploits multi-band to achieve an angular resolution of 6deg. Baseband techniques are then presented, achieving 800MHz signal bandwidth for phase array and 7.5cm resolution for PMCW with good area and energy efficiency. Finally, two radars for vital-sign detection, with multi-mode IR-UWB radar achieving detection range up to 10m, and another combined FMCW and Doppler radar work with shared building blocks, achieving small chirp frequency error of 0.04%.

In this session, the generation of D-band signals using a tripler with adaptive biasing and a regenerative frequency shifter will be presented. For interfacing transmitter and receiver elements to a single antenna, the session will include a presentation on an integrated quasi circulator, based on a coupled-line coupler with tunable termination. The session will also present a compact PA for phased arrays to enable scaling of half-wavelength spaced array elements as well as a wideband PA that provides full D-band coverage by utilizing coupled-line-based matching networks.

This session explores cutting-edge techniques for designing high-performance receiver front-ends, focusing on achieving superior sensitivity, linearity, and blocker rejection while minimizing power consumption. The presented papers delve into novel architectures and circuit techniques, including passive filtering, mixer-first topologies, active feedback, and capacitive stacking, pushing the boundaries of receiver performance across various frequency bands.