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RTu2B-5: An E-Band Phase-Modulated Bistatic Radar with 10mW/Channel Fast-Time Baseband Processing
This work presents a bi-static phase-modulated pulse radar based on analog processing of the fast-time radar signal compatible with communication systems. Based on the proposed scheme we implement an ...
RTu2C-1: A 3D Heterogeneously Integrated Power Amplifier Module Using BiCMOS and RF SOI CMOS Technologies for 5G Applications
This paper presents the first full 3D heterogeneously integrated (HI) power amplifier (PA) module for 5G sub-6 GHz applications, using 130-nm BiCMOS and 130-nm RF Silicon-on-insulator (SOI) CMOS techn...
RTu2C-2: Heterogeneous Integration of a 0.15µm GaN Circulator and a 45nm RF SOI Voltage-Boosted Clock Generation IC
Advanced CMOS nodes suffer from low linearity due to limited breakdown voltages, while III-V semiconductors offer limited BEOL and integration capability, making it challenging to design complex circu...
RTu2C-3: Heterogeneously-Integrated Amplifier-on-Glass with Embedded Gallium Nitride (GaN) Dielet for mmWave Applications
This work presents the first demonstration of a heterogeneously integrated millimeter-wave (mmWave) amplifier-on-glass with embedded Gallium Nitride (GaN) high-electron-mobility transistors (HEMT) die...
RTu2C-4: 3D-Millimeter Wave Integrated Circuit (3D-mmWIC): A Gold-Free 3D-Integration Platform for Scaled RF GaN-on-Si Dielets with Intel 16 Si CMOS
This paper presents a gold-free 3D millimeter wave integrated circuit (3D-mmWIC). Highly scaled GaN-on-Si front-end-of-line (FEOL) RF dielets are integrated with Intel 16 Si CMOS using Cu-Cu thermocom...
RTu2C-5: Determination of the Thermal Noise Parameters of FD-SOI MOSFET Through Hybrid Noise Matrix
A powerful formalism for determining thermal noise parameters, referred to as the NFYs method, is described for MOSFET transistors. This method leverages hybrid two-port network theory and common assu...
RTu3A-1: A 116–132GHz -193.6dBc/Hz-FoMT -252.8dB-FoMJ Frequency Synthesizer Using a 114fs-Jitter 60-GHz Double-Sampling PLL with Magnetic Parabolic Tuning and Injection-Locked Frequency Doubler
A wide-tuning-range (TR) low-phase-noise (PN) D-band frequency synthesizer cascades a mm-Wave double-sampling PLL (DSPLL) with a D-band differential-output injection-locked frequency doubler (ILFM×2)....
RTu3A-2: A 324-to-360-GHz -6-dBm Output Power THz Phase-Locked Loop in 40-nm CMOS
A 340-GHz THz phase-locked loop (PLL) composed of an 85-GHz integer-N charge-pump PLL (CPPLL) and a 340-GHz frequency quadrupler (FQ) is proposed for THz communication applications. The FQ utilizes an...
RTu3A-3: A 28–38GHz Digitally-Assisted Frequency Tripler with Background Calibration in 55nm SiGe BiCMOS
This work presents a 28-to-38 GHz frequency tripler in 55-nm SiGe BiCMOS technology. An on-chip background calibration technique maximizes the output power, improving the fundamental harmonic rejectio...
RTu3A-4: A 35.2–51.4GHz Frequency-Tracking Injection-Locked Frequency Tripler Achieving >28.5dBc Harmonic Rejection Ratios, -7.3dBm Output Power, and 4.3dB Output Power Variation
This paper presents a frequency-tracking injection-locked frequency tripler (ILFT) featuring wide locking range (LR), high harmonic rejection ratios (HRRs), high output magnitude, and low output magni...