Tue
9
Tue 9 Jun | 08:00 - 09:40
Room: 252AB
DetailsRFIC
Technical Sessions
Abstract
The session features both radars and UWB transceivers from the industry. The FMCW radars include BIST solutions for 60GHz MIMO radar SoCs and coded MIMO transceivers designed for 76–81GHz, and an integrated 77GHz radar with in-package antenna launchers for automotive applications. The session also covers UWB receivers for IEEE 802.15.4ab, narrowband-assisted architectures resilient to blockers, and innovative techniques for achieving PVT-robust signal strength estimation.
Tue
9
Tue 9 Jun | 08:00 - 09:40
Room: 254AB
DetailsRFIC
Technical Sessions
Abstract
This session presents advanced frequency multiplication techniques for signal generation from 100 to 310GHz in CMOS and SiGe technologies. The papers demonstrate phase-aligned harmonic recombination, coupled-line-based output matching, amplifier–multiplier chains, and coherent power combining to enhance efficiency, output power, bandwidth, and harmonic suppression. Reported results include up to 16dBm output power, +26.5dBm EIRP, and >70dBc harmonic rejection. Together, these works illustrate scalable circuit strategies for high-purity, high-power D-band and sub-THz transmitters suitable for emerging communication and sensing applications.
Tue
9
Tue 9 Jun | 08:00 - 09:40
Room: 257AB
DetailsRFIC
Technical Sessions
Abstract
Integrated transmit/receive front-ends are rapidly expanding in capability across radar imaging, 5G/6G MIMO, SATCOM phased arrays, and wideband beamforming. This session highlights mm-wave and wideband Tx/Rx architectures that advance calibration accuracy, scalable spatial combining, and packaging-aware integration. Featured designs include a W-band FMCW radar transceiver using a self-calibrated Type-III ADPLL for 1.27cm range-resolution imaging, a compact 28GHz fully-connected Gm-cell-grid MIMO receiver network, a K-band multi-beam phased-array transmitter enabled by silicon-assisted beam combining in a 5-layer PCB, a 2–18GHz 4-channel CMOS T/R beamformer and, a 256-element 28GHz wirelessly-powered active relay transceiver with TDD-sync-free bidirectional amplifiers for robust high-capacity links.
Tue
9
Tue 9 Jun | 08:00 - 09:40
Room: 255
DetailsRFIC
Technical Sessions
Abstract
Next-generation optical interconnects must achieve 200G/400G data rates per lane to support future intra-datacenter requirements. This session showcases high-performance optical transmitter and receiver building blocks engineered to meet these scaling demands. Presentations will cover a diverse range of cutting-edge material platforms and processes, including SiGe, CMOS, Thin-Film Lithium Niobate (TFLN), and InP, highlighting their roles in achieving the necessary power efficiency and signal integrity for the next era of data centers.
Tue
9
Tue 9 Jun | 10:10 - 11:50
Room: 252AB
DetailsRFIC
Technical Sessions
Abstract
This session showcases recent innovations in RF front-end design from across the industry that enable the performance, bandwidth, and integration demands of emerging wireless standards. The talks highlight breakthroughs in low-noise amplification, switching, and frequency generation across CMOS, SiGe, and SOI technologies. Topics include N-path receiver architectures optimized for WiFi 7 multi-link operation, high-gain D-band LNAs, power-efficient mm-wave LNAs for 5G applications, broadband frequency doublers in advanced SiGe processes, and fully differential DC-capable RF switching solutions. Together, these contributions showcase state-of-the-art techniques that push the limits of noise performance, linearity, bandwidth, and integration in modern RF systems.
Tue
9
Tue 9 Jun | 10:10 - 11:50
Room: 254AB
DetailsRFIC
Technical Sessions
Abstract
This session explores cutting-edge clock generation architectures achieving sub-30fs jitter and superior spur suppression. The first paper introduces an 8–28GHz DLL with nested feedback to overcome inverter delay limits. The second paper demonstrates a 6.2GHz sampling PLL with 18.2fsrms jitter using bottom-plate sampling. The third paper describes a fractional-N digital PLL reaching 25.4fs jitter via a series-resonance DCO and power-gated oscillator. The fourth paper presents a ring-oscillator clock multiplier using a reference quadrupler for enhanced noise suppression. Finally, the last paper details a 5GHz ring-oscillator PLL employing over-sampling feedforward cancellation for a record -267.05dB FoM.
Tue
9
Tue 9 Jun | 10:10 - 11:50
Room: 257AB
DetailsRFIC
Technical Sessions
Abstract
This session showcases enabling circuit blocks for next-generation sub-THz transceivers. The talks span key front-end functions such as attenuation, low-noise amplification, frequency generation, and phase shifter, targeting wideband operation and robust performance across process, voltage, and temperature.
Tue
9
Tue 9 Jun | 10:10 - 11:50
Room: 255
DetailsRFIC
Technical Sessions
Abstract
Emerging AI workloads demand an exponential increase in XPU and switch scale-up interconnect bandwidth, alongside high-density die-to-die interfaces. This session explores novel Co-Packaged Optics (CPO) link architectures designed to meet these challenges. Presentations will highlight the use of Micro-Ring Modulators (MRM) and the enhancement of bandwidth through ultra-low-power coherent optics. Key technical deep-dives include UCIe-inspired clock-forwarding and the development of compact, power-efficient building blocks, featuring innovative Phase Interpolator (PI) designs.
Tue
9
Tue 9 Jun | 13:30 - 15:10
Room: 252AB
DetailsRFIC
Technical Sessions
Abstract
GaN technologies continue to attract strong interest for applications demanding high power density. This session highlights recent advances in GaN device technologies spanning recess-free, near enhancement-mode high-performance InAlGaN/GaN HEMTs; a scalable GaN-on-Si process with high power density and linearity for FR3; heterogeneous integration of GaN power amplifiers using diamond interposers; and nonlinear electro-thermal models enabling accurate MMIC HPA prediction up to V-band.
Tue
9
Tue 9 Jun | 13:30 - 15:10
Room: 254AB
DetailsRFIC
Technical Sessions
Abstract
The papers in the seesion present advanced CMOS VCO architectures achieving wide tuning ranges and state-of-the-art phase noise. Innovations include multi-tap inductors for flicker suppression, harmonic-phase tuning via transformer-based impedance control, balanced inverse-class-F operation, multiphase class-B coupling, and dual-mode series-resonance techniques, delivering high FoM across GHz frequencies with competitive power efficiency.
Tue
9
Tue 9 Jun | 13:30 - 15:10
Room: 257AB
DetailsRFIC
Technical Sessions
Abstract
This session explores advanced integration technologies for Power Amplifiers (PAs) and Low-Noise Amplifiers (LNAs), pushing the boundaries of performance and size across a wide range of frequencies. The session begins with a 3D-RDL integration approach for a LDMOS Doherty PA module operating in the 3.4–3.8GHz band, demonstrating innovative packaging solutions for enhanced compactness. Next, the first GaN-on-Silicon (GaN/Si) Doherty PA operating above 7GHz is presented, showcasing the potential of GaN/Si technology for 5G FR3 applications. The session then transitions to mm-wave applications, featuring a 60GHz LNA and PA designed and fabricated in an advanced Gate-All-Around (GAA) CMOS process, demonstrating the capabilities of advanced CMOS logic technologies for mm-wave. Finally, the session ends with a 300GHz PA design in a 130nm SiGe technology, pushing the envelope of SiGe-based solutions for sub-THz applications.
Tue
9
Tue 9 Jun | 15:40 - 17:20
Room: 252AB
DetailsRFIC
Technical Sessions
Abstract
This session presents low-power RF designs targeting sensing and communication applications. The first paper introduces a mixer-first pulsed-LO beam-steering receiver enabling PLL-free operation with scalable power-performance trade-offs. The second paper presents a multi-source RF energy-harvesting IC with event-driven 3-D maximum power point tracking and SIMO regulation. The third paper reports a wideband active true-time-delay circuit achieving fine delay control for efficient self-interference cancellation in full-duplex systems. The final paper demonstrates a miniature LEO satellite localization tag using algorithm–hardware co-design to reduce required EIRP by 10dB while achieving a highly compact integrated transmitter.
Tue
9
Tue 9 Jun | 15:40 - 17:20
Room: 254AB
DetailsRFIC
Technical Sessions
Abstract
This session highlights recent advances in mm-wave front-end building blocks spanning LNAs, PAs, robust T/R interfaces, and a broadband LO generator. Building on the growing demands of broadband links and emerging applications such as satellite communications, the papers in this session emphasize robustness and reconfigurability alongside state-of-the-art performance. Topics include a blocker tolerant K-band LNA with strong Ka band TX rejection and a 12–28GHz LNA used to demonstrate an automated schematic-layout co-optimization platform that tightens the loop between design specs and physical implementation. On the transmit side, a comparison of two SiGe complementary mm-wave PAs, as well as a frequency reconfigurable dual band T/R front-end designed to maintain operation under severe load mismatch will be presented. A LO generator with oscillator-embedded artificial line is demonstrated for wideband next-generation radio.
Tue
9
Tue 9 Jun | 15:40 - 17:20
Room: 257AB
DetailsRFIC
Technical Sessions
Abstract
This session presents recent advances in devices and circuits for system integration. Notable component advances include: a low-loss X-Band Switched-Capacitor Delay Element and signal repeater implemented in 45nm SOI CMOS technology; a dual-mode circular cavity filter; a high-performance RF-SOI switch fabricated on 130nm 200mm technology platform that incorporates a 65nm device; and a multi-channel transceiver featuring Built-in-Self-Test functionality enabled by integrated directional couplers. These papers represent significant progress in the field, driving enhanced system integration with optimized performance.
Tue
9
Tue 9 Jun | 15:40 - 17:20
Room: 255
DetailsRFIC
Technical Sessions
Abstract
This session explores the latest advances in transceivers for the Internet of Things, focusing on ultra-low power consumption and architectural innovation. The session begins with a 2.4GHz, low-latency wake-up receiver featuring a high-efficiency, VCO-based digital demodulator. The discussion then moves to extreme energy constraints, introducing a battery-less, crystal-less, event-driven UWB tag architecture that consumes less than 100nW. A spectral- and energy-efficient tag for BPSK WiFi backscatter systems is then presented, integrating a novel sidelobe-rejection technique. The session concludes with a compact, highly efficient, BLE-compliant wireless transmitter optimized for the next generation of low-power wearable applications.
Tue
9
Tue 9 Jun | 17:00 - 19:30
Location: MCEC, Room 259AB
DetailsRFIC
Networking