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We3H-1: Future State of GaN MMIC Technology for Defense Electronics
This presentation describes our efforts to leverage recent advances in GaN HEMT technology to meet the demands of next-gen defense electronic systems. Systems increasingly require higher operating fre...
We3H-2: A Broadband Doherty-like Load-Modulated Balanced Amplifier with an Optimized Impedance Transformation Ratio in InGaP/GaAs HBT Process for Handset applications
This study presents a design methodology for implementing broadband load modulated balanced amplifier (LMBA) for handset applications. It is evaluated which architecture, Doherty-like LMBA (DL-LMBA) o...
We3H-3: Wideband 3-W GaAs MMIC Doherty PA with Stacked Devices and Load Variation Tolerance Under 2.5:1 VSWR
This paper presents a 3-W GaAs fully integrated multi-stage Doherty power amplifier designed for wideband 5G FR1 applications. The amplifier utilizes a balanced configuration of two Doherty cells, wit...
We3H-4: A Sub-6GHz Ultra-Compact 69.8% Drain Efficiency Harmonic Control Doherty Power Amplifier in GaN Technology
This paper presents a compact sub-6 GHz GaN Doherty power amplifier (DPA) with harmonic control for 5G. Utilizing harmonic tuning up to the 3rd harmonic, both amplifiers achieve high efficiency at pea...
We3H-5: A Ka-Band GaN Doherty Power Amplifier with High Efficiency Over a Fractional Bandwidth of 20.4%
This paper presents the design and implementation of a Ka-band Doherty power amplifier (DPA) fabricated on a 0.1 µm gate-length GaN-on-SiC HEMT technology. The DPA achieves a fractional bandwidth (FWB...
WSA-3: Spur Analysis and Mitigation Techniques for Fractional Synthesizer
The process of fractional-N frequency synthesis inevitably results in periodic signals that manifest themselves as spurious frequency components in the output spectrum. Much research effort has been d...
WSA-4: Calibration-Free DSM Noise Suppression in Analog Frequency Synthesizers
A major advantage of a digital PLL (DPLL) over an analog PLL (APLL) is its ability to cancel quantization noise from the delta-sigma-modulator (DSM) robustly. This allows the loop bandwidth to increas...
WSA-5: Design of a Low-Jitter Ring-Oscillator-Based Fractional-N Digital PLL
Modern SoCs for advanced wireless and wired transceivers are integrating an increasing number of phase-locked loops (PLLs) onto a single silicon die. 5G transceivers require multiple PLLs to support c...
WSA-6: (Voltage-Controlled) Oscillators with Ultra-Low Phase Noise
The talk begins with a tutorial-style by introducing different topologies of integrated harmonic oscillators (such as Colpitts, Class-B, Class-C and others) with emphasis on the phase noise generated ...
WSA-7: Design and Performance Characterization of PLL-Based Chirp Generators for FMCW Radar Applications
Frequency Modulated Continuous Wave (FMCW) radar sensors are widely used in applications such as automotive radar, indoor localization, industrial sensing, and imaging. At the heart of these sensors l...