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WSL-4: High-Power and Highly Efficient Power Amplifiers for D-Band Applications in Silicon
In recent years many new mm-wave applications and standards have been emerging. These systems are mostly a response to the ever-growing demand for higher data speed, higher image resolution, and bette...
WSL-6: E- and D-Band Common-Base Power Amplifiers in SiGe-BiCMOS with Performance Enhanced by Current Clamping and Device Stacking
With 5G established and 6G research ongoing, rising capacity drives the exploration of higher frequency bands. Power amplifiers (PA) drain most of a transceiver’s power. Still, maintaining efficiency ...
WSL-7: Sub-THz SiGe HBT Cascode Power Amplifiers with Capacitive Feedback and its Use in a Supply Modulated RF Transmitter Front-End
An alternate approach to boost the gain of SiGe HBT amplifiers operating above 250GHz using capacitive feedback is demonstrated in a four-stage cascode power amplifier. Unlike the inductive feedback f...
WSL-8: Stacked-FET CMOS Power Amplifier for mm-Wave and Sub-THz Applications
In mm-wave and sub-THz systems, power amplifiers (PAs) play a crucial role in delivering high output power while minimizing power consumption to meet the overall system link budget and performance. Ho...
WSL-5: mm-Wave High Efficiency, High Linearity GaN HEMT, GaAs and InP HBT Power Amplifiers
High-efficiency, high-linearity III-V mmWave power amplifiers (PAs) are critical for 5G, satellite communications, and radar applications. This talk summarizes advancements in III-V high-power technol...
WSA-1: Reference Oscillator Architectures and Design Considerations
Frequency synthesizers require a stable, low noise reference clock. For RF applications, this clock is generated with a crystal or MEMS oscillator, due to the high-Q resonance enabling reference clock...
WSA-2: Beyond All-Digital PLL for RF and mm-Wave Frequency Synthesis
The past several years has seen proliferation of all-digital phase-locked loops (ADPLL) for RF, mm-wave and high-performance frequency synthesis due to their clear benefits of flexibility, reconfigura...
WSA-3: Spur Analysis and Mitigation Techniques for Fractional Synthesizer
The process of fractional-N frequency synthesis inevitably results in periodic signals that manifest themselves as spurious frequency components in the output spectrum. Much research effort has been d...
WSA-4: Calibration-Free DSM Noise Suppression in Analog Frequency Synthesizers
A major advantage of a digital PLL (DPLL) over an analog PLL (APLL) is its ability to cancel quantization noise from the delta-sigma-modulator (DSM) robustly. This allows the loop bandwidth to increas...
WSA-5: Design of a Low-Jitter Ring-Oscillator-Based Fractional-N Digital PLL
Modern SoCs for advanced wireless and wired transceivers are integrating an increasing number of phase-locked loops (PLLs) onto a single silicon die. 5G transceivers require multiple PLLs to support c...